Texas Instruments 74LS Logic Comparators are available at Mouser Electronics. Mouser offers inventory, pricing, & datasheets for Texas Instruments . December INTEGRATED CIRCUITS. 74HC/HCT 8-bit magnitude comparator. For a complete data sheet, please also download. Part Number: 74LS, Maunfacturer: National Semiconductor, Part Family: 74, File type: PDF, Document: Datasheet – semiconductor.

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You can’t use it while the inputs are changing. If you expect to use it, you need to turn the enable off during the time when the compare inputs are in transition.

Here’s the pieces relevant to Power on Jump: Glitchy output shouldn’t be a problem — glitch, Dataeheet see how you got your nickname. I’m not that good with circuit design, but is it possible a monostable multivibrator one-shot would do the job?

It’s comparing the high four address bits to a 4-position DIP switch.

74LS688 8-bit Magnitude Comparator

Note that this would take away 62 nS from the access time of the first instruction fetch after the proper address compare, but it should be OK if you are using newer memory devices.

This might cause a false trigger if your address trap was at B. Hi I doubt you’ll be darasheet to run the output of the directly to a clock. I don’t do well with word descriptions of circuits–can you draw a schematic? I’m currently designing the power-on-jump circuit for my processor board. I’ve never had to use one. 74os688


It may even make it worse. I’m not talking about little tiny noise spikes. In other words, what function does it serve? When the system comes up from a reset, a 74LS with its inputs all tied to ground is connected to the data lines of the CPU and the data bus tranceivers are switched off — this feeds the CPU NOPs until the address equals what’s set on the DIP switch.

There may be better ways to do this job so keep tinkering. This sets the D-type flip flop, which switches off the NOP generator and turns on the bus tranceivers. Just to scratch my own curious itch, what does the connect to? It might work, but I don’t like it much.

For example, going from 9 to A might give a false compare of B for a few nanoseconds. You’re depending too much on the propagation delay of the 74 and the creating a clock pulse of the minimum required width t wclk on your datasheet.

It is a glitchy signal. Hi No it won’t. Glitchy output shouldn’t be a problem — it needs to be inverted for the D-type flip flop’s clock anyway, so I’m using a 74LS14 inverter, which has Schmitt inputs and should clean up the signal into a nice, sharp positive-going square wave.


This is all fine. My calculations say yes, with lots of time to spare, but I’d like others’ opinions.

74LS Datasheet PDF ( Pinout ) – SN74LS

This would also add about 62 nS to your latch clock which right now is only 3 gate delays long and would be difficult to see on an old low bandwidth scope. A way to avoid that would be to de-glitch the circuit by adding a synchronizing flip-flop running at 16MHz just before the latching flip-flop.

As the address lines transition and settle out, they might very 74ls6888 set up a glitch daasheet agrees with the test condition, well before you intended.

Any decoder, like the will create big nasty full swing glitches that can only be removed with the proper clocked gating or latching.

Datasheeg an 8-bit comparator, but it’s cheaper than the 74LS85 and has an enable input. You could then use it as a clock. I got lost reading that.