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In fact it incorporates thevariations. No abstract text available Text: The IC can be forced to enter a controlled burst-mode operation at light load, so as to keep converter’s input consumption to a minimum. In datassheet way, under short circuit conditions, the converter will work intermittently with very low input average power.

As the voltage exceeds a 0. High-side floating gate-drive output. The region on the left-hand side of the diagram in Figure 5, i. Layout carefully the connection of this pin to avoid too large spikes below ground.

This patented structure replaces the normally used external diode. To drive the high-side switch with the bootstrap approach, the IC incorporates a high-voltage floating structure able to withstand more than V with a synchronous-driven high-voltage DMOS that replaces the external fast-recovery bootstrap diode.

As the datasgeet on the pin exceeds 3. High-side gate-drive floating supply Voltage. A capacitor connected from this datashet to GND is charged and discharged by internal current generators programmed by the external network connected to pin 4 RFmin and determines the switching frequency of the converter.


The IC will be soft-restarted as the voltage drops below 0. All of the ground connections of the bias components should be tied to a track going dtasheet this pin and kept separate from any pulsed current return.

Oscillator’s internal block diagram Linformation L Figure The input section is provided withLa double ended primary controller for resonant half-bridge ZVS zero voltage switching.

A is kept always on. Output voltage regulation is obtained by modulating the operating frequency. Sometimes a small bypass capacitor 0. High-side gate-drive floating ground. The comparator is provided with current hysteresis: A fixed deadtime inserted between the turn-OFF of one switch and the turn-ON of the other one guarantees soft-switching and enables high-frequency operation. This input is not intended for a cycle-by-cycle control; hence the voltage signal must be filtered to get average current information.

High-voltage Resonant Controller

Pin settings Pin functions continued Name Function Minimum oscillator frequency setting. Tie the pin to RFmin if burst-mode is not used. To close l66599 feedback loop that regulates the converter output voltage by modulating the oscillator frequency, the phototransistor of an optocoupler will be connected to this pin through a resistor.

Current return for the high-side gate-drive current. TRF SWRA digital power factor meter circuit diagram digital frequency meter circuit diagram microphone mixer schematic circuit diagram digital frequency meter “power factor measurement” schematic PIC Microcontroller Digital panel meter diagram using microcontroller SR schematic diagram of audio device c siemens MHz.

This function realizes datasbeet operation when the load falls below a level that can be programmed by properly choosing the resistor connecting the optocoupler to pin RFmin see block diagram. This frequency shift is non linear to minimize output voltage overshoots; its duration is programmable as well. Every time the voltage on the ISEN pin exceeds 0.


Internally the pin connects a comparator that, when the voltage on the pin exceeds 1. A current generator and is slowly discharged by the external resistor. Oscillator’s internal block diagram.


Leave the pin unconnected if not used. If the voltage on the pin is lower than the reference, the IC enters an idle state and its quiescent current is reduced. A mA datashheet Iq Residual consumption ? Soft-start is not invoked.

Bias the pin between 1. The pin senses the primary current though a sense resistor or a capacitive divider for lossless sensing. Schematic diagram Schematic diagram Figure 1.

During UVLO, it is open. Soft-start and delayed shutdown upon overcurrent timing diagram-Delay C Delay 0. The chip restarts switching as the voltage exceeds the reference by 50 mV.

L Datasheet(PDF) – STMicroelectronics

Delayed shutdown upon overcurrent. The bootstrap capacitor connected between this pin and pin 14 OUT is fed by an internal synchronous bootstrap diode driven in-phase with the low-side gate-drive. LA datasheet, STMicroelectronics 3. LApplication information L Figure